HIMANI SHARMA; PRACHI AHUJA; SHYLAJA V KARATANGI; AMRITA RAI; RESHU AGARWAL. Implementation of Full Adder Using CMOS And DFAL Adiabatic Logic. Journal of Electronic Design Engineering, [S. l.], v. 5, n. 1, p. 1–8, 2019. Disponível em: https://www.matjournals.co.in/index.php/JOEDE/article/view/6693. Acesso em: 12 may. 2025.